Tuesday, October 31, 2023

Google Scholar Indexing

Paper got indexed in Google Scholar

A Normal i/o order Radix 2 FFT architecture to process Twin data streams for MIMO
YVK Reddyi, SI Valli, PG Scholar, GVI Campus
This work introduces a simultaneous computing of many independent fast Fourier transform (FFT) operations with their outputs in natural order is necessary for many applications nowadays. Consequently, this brief demonstrates a brand-new …
Suresh Tech Labs

Monday, October 30, 2023

Got Citation for the Paper we work

Our Paper got sited in International Journal of Digital Technologies [IJDT] , Publish your papers with Free of Cost www.IJISEA.org

Design and comparative analysis of low power,area efficient optimized 10T Hybridfull adder for high performance Arithmetic and Logic Unit

Abstract

In this time of rapid invention and utilisation of battery-operated products, battery life is a
significant problem. Because the traditional Full Adder(FA) uses more energy, we used low power
FA circuitry in this study and examined how it functions in lieu of the traditional Full Adder
circuitry. Contrary to the latest State of Art, only ten transistors make up the suggested design,
which runs on a 0.8 supply voltage. This study compares and contrasts the present design with the
FA's suggested work in respect of power and delay. This design consumes low power of only
674.38 nWand is area efficient as it consists of only ten transistors. The presented design of FA
consumes less power and offers very less delay of only 2.3 ps than existing designs. TANNER EDA
is used to simulate proposed FA and using a 65nm CMOS technology.

Keyword:Addition, XOR, XNOR cell, Low power, Full adder (FA) Hybrid design.



Suresh Tech Labs

Friday, September 22, 2023

Patents List - Call for Applicant & Inventor Positions

Indian Patent Publication Call for Applicant & Inventor Positions

1.Integration of IoT and Artificial for Smart Automation in Industry 4.0 using Sensors.
2.Integration of *Internet of Things and Machine Learning Techniques based approaches for Plant Disease Detection and Classification.
3.Integration of Internet of Things and Machine Learning Algorithms-Based Approaches for Online Election Management System.
4.An Integrated Approach to Cardiovascular Disease Detection Using Image Processing and Machine Learning.
5.An Integrated Approach to Cardiovascular Disease Detection Using Image Processing and Machine Learning.
6.Machine Learning Methods for Intelligent Analysis of Energy Management in IoT-Enabled Smart Cities.
7.A Novel Approach to Greenhouse Automation Using Internet of Things(IoT) and Deep Learning.

if any one interested Please send mail or fill in contact form  or Mail to Us



Saturday, July 22, 2023

Published In SCI - The Imaging Science Journal

SCI Journal: Imaging Science Journal

Publisher: Taylor & Francis




Multimodal medical image fusion using residual network 50 in non-subsampled contourlet transform

Abstract : Medical image fusion technology and its collective diagnosis are becoming crucial day by day. This task confers the latest algorithm for image fusion of medical images to many diagnostic complications. Firstly, transform is employed on input source images. The result of the application of transform is the decomposition of source images into various subbands. Eminent features are extracted from these subbands by using resnet50. These features are fused by phase congruency and guided filtering fusion rules. Finally, inverse transform gives the original image. The experiment results of this algorithm are compared with different methods by taking some pairs of medical images. Subjective and objective outcomes prove that the proposed algorithm exceeds the current methods by giving optimal performance measures in the area of medical diagnosis. Thus, it is revealed that the suggested multimodal image fusion model provides elevated performance over existing models via diverse diseases using MRI-SPECT and MRI-PET.



Thursday, July 13, 2023

Thursday, June 1, 2023

Published in SCI - Low Power VLSI Design Techniques: A Review

Published :  SCI Journal 


Low Power VLSI Design Techniques: A Review

Abstract: Since CMOS technology consumes less power it is a key technology for VLSI circuit design. With technologies reaching the scale of 10 nm, static and dynamic power dissipation in CMOS VLSI circuits are major issues. Dynamic power dissipation is increased due to requirement of high speed and static power dissipation is at much higher side now a days even compared to dynamic power dissipation due to very high gate leakage current and subthreshold leakage. Low power consumption is equally important as speed in many applications since it leads to a reduction in the package cost and extended battery life. This paper surveys contemporary optimization techniques that aims low power dissipation in VLSI circuits.

Keywords: Power dissipation, dynamic power, static power, clock gating, adiabatic logic


Friday, May 19, 2023

Published UGC CARE I Journal

Published UGC CARE I Journal

Printed Dipole-Loop Antenna with High Gain for RF Energy Harvesting Applications

Abstract—In this paper, a compact dual-band antenna for RF energy harvesting applications is presented. The basic antenna structure is formed using a combination between a dipole and a loop antenna to operate at 900 MHz and 1600 MHz, respectively. To enable the antenna to resonate at a dual- band within a compact substrate, two L-shaped vertical arms as a dipole connected with a trapezoidal slot loop. A meandered transmission line is connected to the coplanar slot line to act as a stub to match the input impedance of the dipole and the loop. On the back of the antenna, a reflector is positioned to enhance the forward to back ratio and provide a unidirectional radiation pattern. The antenna has a compact size 0.149λo 0.23λo (with respect to the wavelength at the lowest operating frequency),making it comparatively smaller than similar designs. It has a measured fractional bandwidth of 11% at 0.970 GHz at the lower band and 52.9% at the upper band from 1.5 to 2.58 GHz. The antenna performance has a peak gain of 6.5 dB. To prove the antenna normal operation, a prototype is fabricated, tested and the measurements are compared against the simulation results. This antenna is intended for the RF wireless energy harvesting applications.

Suresh Tech Labs 



Sunday, April 16, 2023

Published Paper in UGC CARE- I



Published Paper in UGC CARE- I 

DESIGN & IMPLEMENTATION OF EV SYSTEM BY USING RENEWABLE ENERGY SOURCE

In the current scenario, global warming is a threat to the society. One of the major reasons is the release of carbon-di-oxide from an automobile exhaust due to the combustion of fossil fuels which pollutes the environment. One of the optimistic solutions for this problem is to use of hybrid vehicles. Generally, Hybrid vehicle involves a combination of transmission system driven through electrical, solar as well as internal combustion (IC) engine. In real life applications using solar vehicle produces zero emissions. At present, hybrid electric vehicles are being developed and launched into the market. For long distance travelling its necessary of periodic charging of their batteries, so these vehicles are depends the electrical sources also leads to increase the cost of electricity. These kinds of problems will be solved by using hybrid solar vehicle also HSV supporting to the green environment. 

Keywords - global warming, fossil fuels, hybrid vehicles, hybrid solar vehicle, green environment, emissions.


Friday, March 17, 2023

Indexed in - Google Scholar

Optimization of PAPR in OFDM using Orthogonal Selective Level Mapping (SLM)

Indexed in - Google Scholar

Abstract— To optimize the PAPR in conventional OFDM, Low Complexity Selective Level Mapping (SLM) is considered in this paper as it reduces PAPR significantly without loss of information. Orthogonal Frequency Division Multiplexing (OFDM) is the multicarrier modulation techniques, and it provides the provides the high spectral efficiency, low complication in implementation, less sensitivity to echoes and distortion. Due to these advantages of OFDM system is vastly used in various communication systems. But the major drawback of OFDM system is increase in peak power due to coherent addition of sub carriers. OFDM signal is the sum of many independently modulated sinusoidal waves and the amplitude is almost Rayleigh distribution. Amplitude of OFDM signal shows strong fluctuations and the resultant high Peak-to Average. Several techniques have been proposed to reduce PAPR, Low Complexity SLM can be employed in this paper to reduce PAPR in an OFDM system. In Low complexity SLM, PAPR can be reduced by multiplying the original signal with Orthogonal vector and generate statistically independent sequences which represent the same information before IFFT operation in OFDM system. The resulting independent data blocks are then forwarded into IFFT operation simultaneously and generate OFDM signal sequences.

After that compute the PAPR for all the OFDM signal sequences. Finally, the one sequence with the smallest PAPR will be selected for transmission. The proposed SLM scheme achieves similar PAPR reduction performance with much lower computational complexity compared with the conventional SLM scheme. The performance of the proposed SLM scheme is verified with various modulation schemes. The results are simulated using MATLAB.

Keywords— Selective Level Mapping (SLM), OFDM, Peak to Average Power Ratio



Saturday, March 11, 2023

Published - UGC CARE II Journal

Published -  UGC CARE II Journal



High Speed Low Area Distributed Arithmetic-fir Filter For Applications Used In Signal Processing

Abstract - In this paper, we present a novel Distributed Arithmetic based Finite Impulse Response filter for signal processing applications. DA based FIR filter will occupy more area and power when filter order is increased. To get rid of this, in the paper, we used offset binary coding (OBC) concept. Instead of using binary inputs we are using OBC values for increasing the speed. By using OBC concept the memory usage will be decreased when compared with the basic DA. The proposed design is implemented in Xilinx tool. The area occupied by the proposed design is half when compared with basic DA. The speed of operation of the proposed design is very high.

Keywords- Distributed Arithmetic, Finite impulse response, signal processing, offset binary coding.

Published : International Journal with ISSN Number

Published : International Journal with ISSN Number

Digital Image Processing - Research Opportunities and Challenges

Interest in digital image processing methods stems from two principal application areas: improvement of pictorial information for human interpretation; and processing of image data for storage, transmission, and representation for autonomous machine perception. The objectives of this article is to define the meaning and scope of image processing, discuss the various steps and methodologies involved in a typical image processing, and applications of image processing tools and processes in the frontier areas of research.

Key Words: Image Processing, Image analysis, applications, research.

Monday, March 6, 2023

Published - UGC CARE II Journal

Published - UGC CARE II Journal

High Speed Low Power Pre-Charge CAM Design  using Hybrid self-control

Abstract :  In this paper, we present a novel content addressable memory (CAM) is discussed. Although it uses more power, ontent-addressable memory (CAM) is a popular piece of hardware for high-speed lookup searches. Traditional NOR and NAND match-line (ML) architectures experience charge and short circuit path sharing during pre-charge, respectively. The pre-charge-free CAM that was recently proposed has a high search cost. delay and excessive power consumption of the subsequently proposed elf-controlled pre-charge-free CAM. In order to decrease search delay and power consumption, the hybrid self-controlled pre- harge-free (HSCPF) CAM architecture presented in this study employs a unique charge control circuitry. Both the present and planned CAM ML designs were created using the CMOS 45nm technology node and a 1 V supply voltage. When compared to, simulation results demonstrate that the suggested HSCPF CAM-type ML design effectively reduces power consumption and search latency. 

 Keywords: Content Memory Address, hybrid model, Precharge phase.